Digital Down Converter on FPGA

Notes
Polyphase FIR Decimator: FIR Anti-aliasing Filter + DownSampling
Anti-aliasing: Sinyalin BW ini azaltıyor.
To reduce amplitude quantization noise &
spread the spurious frequencies the avaliable bandwidth :
add a dither signal to the accumulator phase values.

spur vs harmonic

DDC GSM Matlab
Analysis of DDC Matlab

http://www.mathworks.com/help/dsp/ref/dsp.firrateconverter-class.html
http://www.mathworks.com/help/dsp/ref/dsp.firdecimator-class.html
http://www.mathworks.com/help/dsp/ref/dsp.firinterpolator-class.html