Homodyne : No IF stage(Direct conversion)
Heterodyne IF stage
Direct conversion da
1)IF stage yok
2)Image rejection filtre gerekmiyor
Fakat 2 major drawback e sahip:
1) DC offset
2) IQ imbalance(dB ve degree olarak) Yani amplitude ve phase imbalance
Gen2 USRP lerin FPGA tasarımı.
Çok faydalı döküman
http://www.pentek.com/tutorials/15_4/digdown.cfm
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