Friday, January 1, 2016

Working on:Topics Detailed



MB vs Nios
Vivado vs Quartus
Vivado incremental compile
Direct conversion - Down conversion
DMA,dma,vdma,cdma
AXI bus
Scatter Gather
MMU
MB linux
SDK Xilkernel
Zedgraph
Cordic
Matlab hdl coder
AGC
parameters.h - system.h
tcp,udp,lwip,ethernet c#
cache coherency-flush,invalidate,sdk example
fpga vhdl floating point
dynamic memory allocation
clock jitter
dds advanced properties(phase increment,phase offset,phase out,amplitude mode)
dsp slice-bram(18k) count
 TCL
xilinx divider generator 5.1
dsp48e1 slice,48a,48a1,dsp48 macro 3.0,Virtual IO ip , utilit vector logic,utility reduced logic
pipelining
vivado hls
PCIexpress
AXI MM to PCIe
GTX,GTP transceivers
PCIe,Gigabit ethernet,SATA,Aurora
do254,bit accurate-cycle accurate












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